Design of Analog Integrated Circuits Robust to RF Interference

Chapter 1 Introduction The most recent achievements of silicon CMOS technology in terms of geometri- cal scaling and versatility have paved the way to the low cost integration of high performance electronic systems on a single chip (System on a Chip, SoC) and have brought about new challenges in present day microelectronic design. The fully integration on a single chip of complex systems which include digital, analog, power and RF sections, however, requires a completely new approach in integrated circuit (IC) design [1, 2, 3, 4]. In fact, while traditional IC design is mainly addressed to the optimization in terms of performance of each single function, SoC design should be firstly aware of the overall system integration and of the final application environment. To this purpose, new requirements and new design tradeoffs arise. The aspects related to chip-level Electromagnetic Compatibility (EMC) [5], i.e. with the adverse effects which may be induced by the unintentional generation, propagation and reception of electromagnetic energy within an integrated circuit, deserve a special attention in complex SoC design. These aspects cover both the adverse effects which are induced in IC operation by electromagnetic energy collected from the external environment (inter-EMC, susceptibility), the adverse effects which may by induced in the external environment by IC operation (inter-EMC, emission) and the adverse effects which are induced by IC operation in different sections within the same IC (intra-EMC). The susceptibility of IC cells to Radio-Frequency Interference (RFI), in partic- ular, has proven to be among the major threats to SoC reliable operation in both intra-EMC and inter-EMC aspects. In fact, with reference to the typical SoC con- figuration shown in Fig.1.1, it can be observed that potential sources of interference as high-frequency synchronous digital circuits, RF power amplifiers and switching power supplies are located very close to susceptible circuitry and RF disturbances can easily couple with nominal signal paths through on-chip metal interconnections, I/O pads or via the silicon substrate. 1