An FPGA Implementation of a Chaotic Encryption Algorithm

1 Introduction After the advent of the Internet and especially nowadays, security of data and pro- tection of privacy have become a major concern for everyone’s life, although math- ematicians and researchers have been trying to address this problem since the end of the World War II, when cryptology science came out from the ambit of the army to enter the Bell Laboratories. DES, RSA and PGP are only the tip of the iceberg of a vast amount of cryptographic algorithms developed by those scientists. In fact, many other cipher systems based on different mathematical properties have been designed, some of them for speci c purposes like the one implemented in this the- sis. Combining together two apparently distant sciences like cryptography and chaos theory, J. Scharinger has proposed a new product cipher whose aim is to guarantee security and privacy in image and video archival applications. This encryption tech- nique makes use, during its permutation phase, of the Kolmogorov ows which are well-known to be dynamically unstable systems. The absence of computationally heavy operations such as multiplications or divisions makes his algorithm particu- larly attractive for hardware implementation. Aside from the two reports by Scharinger [10] [11], very little work seems to exist on this topic, probably because of a general scepticism by the cryptographic community about using chaotic systems for encryption purposes. Some theoretical papers have been produced by Z. Kotulski and J. Szczepaæski [7] and during the Eurocrypt ’91 in general. On the practical side, an attempt to design an electronic circuit which uses nonlinear dynamic approach in order to send secret messages has been described in [14, p. 335]. The objective of this thesis consists of demonstrating the feasibility of a Scharin- ger’s cipher algorithm hardware implementation and of investigating on its features of throughput and area occupancy. Since this is one of the rst attempts to design in hardware a cryptographic system that uses chaos theory, parameterization of the circuit, rapidity in project development and exibility during test and improvement phases are main issues. To